[JA] _________________________ AMAST Links 03 01

Formal Verification job openings

General Systems Lab - Hewlett-Packard Company, Roseville, California

The full version of this announcement is available.

The General Systems Laboratory of Hewlett-Packard is again hiring verification engineers with skills and interests in Formal Verification. Successful applicants will join a small-but-growing team whose charter is to apply Formal Methods to a variety of computer system design problems. This is an opportunity to develop formal techniques which will have genuine impact on the computer industry.

Requirements:

• BS, MS or Ph.D degree in EE, CE, CS, CEE or CSEE.
• Experience in one of the following areas: VLSI, Firmware, board design or system simulation.
• Solid understanding of computer architecture.
• Minimum 3 years experience in formal verification.
• Strong communication and teamwork skills.
• Must be flexible and willing to work in areas other than FM.

In addition to the above requirements, previous experience in some of the following areas is preferred:

• Integrated circuit design, verification, tools and methodologies.
• VLSI testing, characterization, diagnostics.
• CPU board design.
• RISC Assembly language programming, C programming.
• Behavioural modeling.
• Industrial use of Formal Methods.

For immediate consideration, email your resume to:

fvjobs@rosemail.rose.hp.com

Hewlett-Packard is an equal employment opportunity employer dedicated to affirmative action and workforce diversity.